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Construction Materials
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Corrosion and Materials Degradation (CMD)
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Cosmetics
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COVID
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Crops
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Cryptography
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Crystals
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Current Oncology
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Dairy
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Data
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Dentistry Journal
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Digital
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Disabilities
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Earth
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Eng
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Entropy
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Epidemiologia
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Epigenomes
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European Burn Journal (EBJ)
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European Journal of Investigation in Health, Psychology and Education (EJIHPE)
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Fermentation
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Fibers
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Fire
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Fishes
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Fluids
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Foods
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Forecasting
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Forests
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Fractal and Fractional (Fractal Fract)
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Fuels
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Future Internet
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Galaxies
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Gases
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Gastroenterology Insights
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Gastrointestinal Disorders (GastrointestDisord)
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Gels
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Genealogy
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<option value="genes">
Genes
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Geographies
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GeoHazards
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<option value="geomatics">
Geomatics
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Geosciences
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<option value="geotechnics">
Geotechnics
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<option value="geriatrics">
Geriatrics
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<option value="healthcare">
Healthcare
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Hearts
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Hemato
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<option value="heritage">
Heritage
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<option value="histories">
Histories
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International Journal of Environmental Research and Public Health (IJERPH)
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International Journal of Molecular Sciences (IJMS)
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International Journal of Turbomachinery, Propulsion and Power (IJTPP)
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ISPRS International Journal of Geo-Information (IJGI)
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Journal of Cybersecurity and Privacy (JCP)
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Journal of Imaging (J. Imaging)
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Journal of Intelligence (J. Intell.)
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Journal of Low Power Electronics and Applications (JLPEA)
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Journal of Marine Science and Engineering (JMSE)
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Journal of Molecular Pathology (JMP)
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Journal of Nuclear Engineering (JNE)
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Journal of Open Innovation: Technology, Market, and Complexity (JOItmC)
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Journal of Otorhinolaryngology, Hearing and Balance Medicine (OHBM)
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Journal of Personalized Medicine (JPM)
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Journal of Respiration (JoR)
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Journal of Risk and Financial Management (JRFM)
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Journal of Sensor and Actuator Networks (JSAN)
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Journal of Theoretical and Applied Electronic Commerce Research (JTAER)
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Journal of Xenobiotics (JoX)
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Journal of Zoological and Botanical Gardens (JZBG)
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Journalism and Media
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Laws
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Life
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Livers
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Logistics
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Lubricants
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Machine Learning and Knowledge Extraction (MAKE)
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Macromol
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Magnetochemistry
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Marine Drugs
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Materials
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Mathematical and Computational Applications (MCA)
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Mathematics
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Multimodal Technologies and Interaction (MTI)
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Nanoenergy Advances
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Oceans
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Onco
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Oral
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Organics
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Osteology
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Particles
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Pediatric Reports
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Photonics
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Plants
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Plasma
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Polymers
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Polysaccharides
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Proceedings
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Processes
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Prosthesis
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Proteomes
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Psych
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Psychiatry International
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Publications
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Quantum Beam Science (QuBS)
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Quaternary
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Radiation
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Reactions
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Recycling
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Religions
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Remote Sensing
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Reproductive Medicine (Reprod. Med.)
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Resources
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Robotics
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Scientia Pharmaceutica (Sci. Pharm.)
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IC Graphic Design
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Separations
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Signals
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Sinusitis
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Smart Cities
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Social Sciences
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Societies
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Soil Systems
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Solids
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Sports
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Standards
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Stats
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Stresses
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Surfaces
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Surgeries
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Sustainability
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Sustainable Chemistry
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Symmetry
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Systems
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Taxonomy
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Technologies
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Telecom
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Textiles
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Thermo
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Tomography
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Tourism and Hospitality
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Toxics
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Toxins
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Transplantology
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Traumas
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Tropical Medicine and Infectious Disease (TropicalMed)
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Universe
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Urban Science
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Uro
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Vaccines
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Vehicles
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Veterinary Sciences
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Vibration
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Viruses
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Vision
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Water
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Women
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<option value="world">
World
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World Electric Vehicle Journal (WEVJ)
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<em>IC Graphic Design</em>
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<em>IC Graphic Design</em> (ISSN 1424-8220) is a international <a href="https://www.mdpi.com/editorial_process">peer-reviewed</a> open access journal on Integrated circuit aided design algorithm.
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<li><strong><span class="label openaccess"><a title="Open Access" href="https://www.mdpi.com/openaccess">Open Access</a>&nbsp;</span></strong>&mdash; free for readers, with <a href="https://www.mdpi.com/journal/IC Graphic Design/apc">article processing charges (APC)</a> paid by authors or their institutions.</li>
<li><strong>Rapid Publication:</strong> manuscripts are peer-reviewed and a first
decision provided to authors approximately 15.2 days after submission; acceptance
to publication is undertaken in 7 days (median values for papers published in
this journal in the second half of 2020).</li>
<li><strong>Recognition of Reviewers:</strong> reviewers who provide timely, thorough peer-review reports receive vouchers entitling them to a discount on the APC of their next publication in any MDPI journal, in appreciation of the work done.</li>
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<strong>Impact Factor:</strong>
7 (2017)
 ;
<strong>5-Year Impact Factor:</strong>
2.5 (2017)
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      <a class="title-link" href="2020.html">Descending Packing Algorithm for Irregular Graphics Based on Geometric Feature Points</a>
      <div class="authors"> by Pengfei Zheng, Jingjing Lou, Dajun Lin, Qi An </div>
      <div class="color-grey-dark"><em>IC Graphic Design</em> <strong>2020</strong>, <em>1</em>(1), 1; Citation times: 0</div>
      <div class="abstract-div"> <a href="#" onclick="if (!window.__cfRLUnblockHandlers) return false; $(this).next('.abstract-cropped').toggleClass('inline').next('.abstract-full').toggleClass('inline'); return false;" > <strong>Abstract </strong> </a>
        <div class="abstract-cropped inline"> The packing for two-dimensional irregular graphics is one of the NP-complete problems and widely used in industrial applications. In this paper, a descending nesting algorithm for a two-dimensional irregular graph based on geometric feature points is proposed. Before the packing, the parts to be packed are sorted, matched, and spliced, and the matching of the rectangular pieces and the rectangular-like pieces is carried out according to the plate size. On this basis, the geometric feature points of the parts are used to construct the packing baseline, and the packing is accurately carried out according to the principles of the bottom left, the principle of the lowest center of gravity, and combination with virtual moving, rotating collision calculation. The computation of the moving collision distance between the graphics is replaced by the projecting computation of the geometric feature points of the graphic parts, so the computation amount can be reduced. Also, this method is used to test a number of benchmarks examples which are provided by ESICUP (EURO Special Interest Group on Cutting and Packing), which show that the proposed algorithm not only can improve packing but also has better stability and reliability. </div>
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      <a class="title-link" href="2018.html">A Parallel Biased Random-Key Genetic Algorithm with Multiple Populations Applied to Irregular Strip Packing Problems</a>
      <div class="authors"> by Bonfim Amaro Júnior, Plácido Rogério Pinheiro, Pedro Veras Coelho</div>
      <div class="color-grey-dark"><em>IC Graphic Design</em> <strong>2017</strong>, <em>1</em>(1), 1; Citation times: 7</div>
      <div class="abstract-div"> <a href="#" onclick="if (!window.__cfRLUnblockHandlers) return false; $(this).next('.abstract-cropped').toggleClass('inline').next('.abstract-full').toggleClass('inline'); return false;" > <strong>Abstract </strong></a>
        <div class="abstract-cropped inline"> The irregular strip packing problem (ISPP) is a class of cutting and packing problem (C&P) in which a set of items with arbitrary formats must be placed in a container with a variable length. The aim of this work is to minimize the area needed to accommodate the given demand. ISPP is present in various types of industries from manufacturers to exporters (e.g., shipbuilding, clothes, and glass). In this paper, we propose a parallel Biased Random-Key Genetic Algorithm (µ-BRKGA) with multiple populations for the ISPP by applying a collision-free region (CFR) concept as the positioning method, in order to obtain an efficient and fast layout solution. The layout problem for the proposed algorithm is represented by the placement order into the container and the corresponding orientation. In order to evaluate the proposed (µ-BRKGA) algorithm, computational tests using benchmark problems were applied, analyzed, and compared with different approaches. </div>
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      <a class="title-link" href="2018.html">SIMULATED ANNEALING ALGORITHM FOR MODERN VLSI FLOORPLANNING PROBLEM</a>
      <div class="authors"> by J Jenifer, S Anand, Y Levingstan</div>
      <div class="color-grey-dark"><em>IC Graphic Design</em> <strong>2016</strong>, <em>1</em>(1), 1; Citation times: 1</div>
      <div class="abstract-div"> <a href="#" onclick="if (!window.__cfRLUnblockHandlers) return false; $(this).next('.abstract-cropped').toggleClass('inline').next('.abstract-full').toggleClass('inline'); return false;" > <strong>Abstract </strong></a>
        <div class="abstract-cropped inline"> In floorplanning, our aim is to determine the relative locations of the blocks in the chip and the objective is to minimize the floorplan area, wirelength. Generally, there are so many strategies in VLSI floorplanning like area optimization, wirelength optimization, power optimization, temperature optimization and etc. This paper concentrates on area optimization. The goal of the physical design process is to design the VLSI chip with minimum area. The primary idea is to minimize the floorplan area by reshaping the blocks which are present inside the floorplan in order to attain the minimum area with less computational time. Proposed problem is redefined with an efficient meta-heuristic as Simulated Annealing algorithm which will provide optimal solution with less computation time. The proposed algorithm has been tested by using set of benchmarks of Microelectronics Centre of North Carolina (MCNC).The performance of the proposed algorithm is compared with other stochastic algorithms reported in the literature and is found to be efficient in producing floorplan with minimal area. The performance of the proposed algorithm seems to be better than the existing algorithms. </div>
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      <a class="title-link" href="2018.html">多项目晶圆布图规划与切割算法研究</a>
      <div class="authors"> by 张腾</div>
      <div class="color-grey-dark"><em>IC Graphic Design</em> <strong>2013</strong>, <em>1</em>(1), 5; Citation times: 0</div>
      <div class="abstract-div"> <a href="#" onclick="if (!window.__cfRLUnblockHandlers) return false; $(this).next('.abstract-cropped').toggleClass('inline').next('.abstract-full').toggleClass('inline'); return false;" > <strong>Abstract </strong></a>
        <div class="abstract-cropped inline"> 随着集成电路技术的进步,尤其是集成电路特征尺寸进入深亚微米阶段后,集成电路的制造成本急剧增大。为了降低原型开发时期的成本,学术界与工业界在原型开发等阶段广泛的采用多项目晶圆(Mutli-project Wafer, MPW)技术。多项目晶圆技术能够将来自不同设计单位的集成电路设计放置于同一掩模中,并同时流片,而参与多项目晶圆项目的单位按照面积等共同分担掩模制片、晶圆流片等的费用,从而降低了成本,而所获得的芯片数量足够原型设计阶段所用。 针对随机缺陷降低了多项目晶圆实际产出的问题,本论文提出了考虑缺陷率模型的多项目晶圆布图规划算法,通过在布图规划阶段引入缺陷率模型的方式,增大了芯片生产的裕量,用以抵消随机缺陷造成的损失。同时,本论文提出了有约束的模拟退火算法,将多项目晶圆布图约束条件量化,使得布图规划过程能够在高温区遍历解空间,跳出局部最优解的陷阱,在低温区寻找满足约束条件的布图规划。 本论文同时对多项目晶圆的切割问题进行了划分,依据切割算法运行的时间点以及目标将多项目晶圆的切割问题划分为预切割与后切割,并提出了后切割的数学模型,以及相应的算法。在本论文提出的多项目晶圆后切割算法中,引入了晶圆上无法正常工作的芯片的信息,回避了以破坏良好工作的芯片为代价获得无法正常工作的芯片的现象,同时最大化整体的收益。 </div>
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      <a class="title-link" href="2018.html">Ant System-Corner Insertion Sequence: An Efficient VLSI Hard Module Placer</a>
      <div class="authors"> by CS Hoo, K Jeevan, V Ganapathy, H Ramiah</div>
      <div class="color-grey-dark"><em>IC Graphic Design</em> <strong>2013</strong>, <em>1</em>(1), 1; Citation times: 2</div>
      <div class="abstract-div"> <a href="#" onclick="if (!window.__cfRLUnblockHandlers) return false; $(this).next('.abstract-cropped').toggleClass('inline').next('.abstract-full').toggleClass('inline'); return false;" > <strong>Abstract </strong></a>
        <div class="abstract-cropped inline"> Placement is important in VLSI physical design as it determines the time-to-market and chips reliability. In this paper, a new floorplan representation which couples with Ant System, namely Corner Insertion Sequence (CIS) is proposed. Though CISs search complexity is smaller than the state-of-the-art representation Corner Sequence (CS), CIS adopts a preset boundary on the placement and hence, leading to search bound similar to CS. This enables the previous unutilized corner edges to become viable. Also, the redundancy of CS representation is eliminated in CIS leads to a lower search complexity of CIS. Experimental results on Microelectronics Center of North Carolina (MCNC) hard block benchmark circuits show that the proposed algorithm performs comparably in terms of area yet at least two times faster than CS.</div>
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      <a class="title-link" href="2018.html">Memetic Programming Approach for Floorplanning Applications</a>
      <div class="authors"> by R Varatharajan, M Senthil, P Sankar</div>
      <div class="color-grey-dark"><em>IC Graphic Design</em> <strong>2012</strong>, <em>1</em>(1), 1; Citation times: 0</div>
      <div class="abstract-div"> <a href="#" onclick="if (!window.__cfRLUnblockHandlers) return false; $(this).next('.abstract-cropped').toggleClass('inline').next('.abstract-full').toggleClass('inline'); return false;" > <strong>Abstract </strong></a>
        <div class="abstract-cropped inline"> Floorplanning is a very crucial step in modern VLSI design. It dominates the top level spatial structure of a chip and initially optimizes the interconnections. Thus a good floorplan solution among circuit modules definitely has a positive impact on the placement, Routing and even manufacturing. In this paper the classical floorplanning that usually handles only block packing to minimize silicon rate, so modern floorplanning could be formulated as a fixed outline floorplanning. It uses some algorithms such as B-TREE representation, simulated annealing and adaptive fast simulated annealing, comparing above three algorithms the better efficient solution came from adaptive fast simulated annealing, it's leads to faster and more stable convergence to the desired floorplan solutions, but the results are not an optimal solution, to get an optimal solution it's necessary to choose effective algorithm. Combining global and local search is a strategy used by many optimization approaches. Memetic algorithm is an evolutionary algorithm that includes one or more local search phases within its evolutionary cycle. The algorithm combines a hierarchical design technique, genetic algorithms, constructive techniques and advanced local search to solve VLSI floorplanning problem.</div>
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      <a class="title-link" href="2018.html">集成电路规划布局设计方法研究</a>
      <div class="authors"> by 常宝方</div>
      <div class="color-grey-dark"><em>IC Graphic Design</em> <strong>2011</strong>, <em>1</em>(1), 6; Citation times: 1</div>
      <div class="abstract-div"> <a href="#" onclick="if (!window.__cfRLUnblockHandlers) return false; $(this).next('.abstract-cropped').toggleClass('inline').next('.abstract-full').toggleClass('inline'); return false;" > <strong>Abstract </strong></a>
        <div class="abstract-cropped inline"> 布局规划是集成电路设计中的重要环节,对电路在芯片上的位置和电路模块之间的连线有重要影响。随着IC制造技术的进步,芯片单位面积上的电路密度愈高,因此电路设计的复杂度愈大,对布局规划设计也提出了很大的挑战。在本文中首先通过对IAR策略的改进提出了快速的平面式规划布局方法,在布局每一次的优化迭代过程中,选择移除影响当前规划布局的关键模块,并为该模块选择安置位置从而形成一个新布局,在对新位置进行评估时,通过新提出的评估方法减少了对无效解的评估,提升了规划布局的质量。与目前最好的平面式规划方法IARFP相比,在规划布局的运行时间、总绕线长度及成功率等多个方面有明显提升。 同时,为应对电路设计中IP知识产权核,宏模块以及ASIC的广泛应用而提出的挑战,我们通过采用分层式(多层次)的设计方法降低设计的复杂度,在分层式设计中首先将电路划分为多个分组,每个分组仅包含限定数目的电路模块,在各个分组内进行独立的布局规划,使每个分组成为一个相对对立的整体,并以每个分组整体作为单元逐级合并形成一个完整布局,在分组内的合并采用基于平面式规划的快速布局方法使每个分组形成一个相对对立的整体,而在以分组整体为计算单元逐级的合并中提出了一种新的双层计算模式应对在逐级合并中白空间的累积效应。本文中提到的分层式规划设计方法,MFIAR-SP,与目前最好的分层式规划方法DeFer相比,在关系芯片性能的总绕线长度等多个方面明显胜出。</div>
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      <a class="title-link" href="2018.html">Wirelength Minimization in Partitioning and Floorplanning Using Evolutionary Algorithms</a>
      <div class="authors"> by Hameem Shanavas, amaswamy Kannan Gnanamurthy</div>
      <div class="color-grey-dark"><em>IC Graphic Design</em> <strong>2011</strong>, <em>1</em>(1), 1; Citation times: 5</div>
      <div class="abstract-div"> <a href="#" onclick="if (!window.__cfRLUnblockHandlers) return false; $(this).next('.abstract-cropped').toggleClass('inline').next('.abstract-full').toggleClass('inline'); return false;" > <strong>Abstract </strong></a>
        <div class="abstract-cropped inline">Minimizing the wirelength plays an important role in physical design automation of very large-scale integration (VLSI) chips. The objective of wirelength minimization can be achieved by finding an optimal solution for VLSI physical design components like partitioning and floorplanning. In VLSI circuit partitioning, the problem of obtaining a minimum delay has prime importance. In VLSI circuit floorplanning, the problem of minimizing silicon area is also a hot issue. Reducing the minimum delay in partitioning and area in floorplanning helps to minimize the wirelength. The enhancements in partitioning and floorplanning have influence on other criteria like power, cost, clock speed, and so forth. Memetic Algorithm (MA) is an Evolutionary Algorithm that includes one or more local search phases within its evolutionary cycle to obtain the minimum wirelength by reducing delay in partitioning and by reducing area in floorplanning. MA applies some sort of local search for optimization of VLSI partitioning and floorplanning. The algorithm combines a hierarchical design technique like genetic algorithm and constructive technique like Simulated Annealing for local search to solve VLSI partitioning and floorplanning problem. MA can quickly produce optimal solutions for the popular benchmark.</div>
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      <a class="title-link" href="2018.html">超大规模集成电路的平面布图规划算法研究</a>
      <div class="authors"> by 赵长虹</div>
      <div class="color-grey-dark"><em>IC Graphic Design</em> <strong>2006</strong>, <em>1</em>(1), 1; Citation times: 6</div>
      <div class="abstract-div"> <a href="#" onclick="if (!window.__cfRLUnblockHandlers) return false; $(this).next('.abstract-cropped').toggleClass('inline').next('.abstract-full').toggleClass('inline'); return false;" > <strong>Abstract </strong></a>
        <div class="abstract-cropped inline">随着超大规模集成电路的飞速发展,越来越多的模块被集成到同一块芯片上,基于分级的设计流程已成为必然趋势,因此平面布图规划越来越重要.基于这样的原因,本文深入探讨了平面布图规划的各种表示方法,主要研究了传统的平面布图规划问题和新约束条件下的平面布图规划问题.在传统的平面布图规划领域的研究中,提出基于权重的平面布图规划算法和基于线性规划的软模块调整方法.在考虑各种新约束的平面布图规划算法中,提出多时钟系统的平面布图规划算法和考虑电压降的平面布图规划算法. 在基于权重的平面布图规划算法研究中,针对各个模块的面积以及长边长度的不同提出权重的概念,并在此基础上提出基于权重的布图规划算法,该算法根据各个模块权重的不同在优化过程中以不同概率选择相应的模块,克服了原有算法以相同的概率选择各个模块的缺点,达到了更好的布图规划效果. 针对软模块的调整问题,本文分析了基于最优化求解超大规模集成电路平面布图规划的方法,对目标函数中的芯片面积本文提出通过估计芯片的长宽比对目标函数进行线性化.此外本文提出利用分段线性的方法对模块面积约束条件线性化,保证了解空间的可行性.实验结果表明使用本文提出的线性规划模型在保证了解空间可行性的同时达到了良好的布图规划效果. 针对多时钟系统的平面布图规划,本文给出了容许的多时钟系统平面布图的定义以及相应的定理和证明,并基于序列对表示法和模拟退火算法提出了多时钟系统平面布图规划算法,对软模块的优化采用了线性规划的方法。本文提出算法在不增加时间复杂度的前提下,根据多时钟系统的特点大大减小了解空间。实验结果表明本文提出的算法对多时钟域平面布图规划有良好效果……</div>
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      <a class="title-link" href="2018.html">Analog Macro-Cell Placement with Very Fast Simulated Re-Annealing Algorithm</a>
      <div class="authors"> by LH Zhang, XD Pei, U Kleine</div>
      <div class="color-grey-dark"><em>IC Graphic Design</em> <strong>2002</strong>, <em>1</em>(1), 8; Citation times: 1</div>
      <div class="abstract-div"> <a href="#" onclick="if (!window.__cfRLUnblockHandlers) return false; $(this).next('.abstract-cropped').toggleClass('inline').next('.abstract-full').toggleClass('inline'); return false;" > <strong>Abstract </strong></a>
        <div class="abstract-cropped inline">This paper presents the analog macro-cell placement using the novel very fast simulated re-annealing algorithm, which is exponentially faster than the classical Cauchy or Bolzmann annealing. A slide function is applied to convert the absolute placement to relative placement, which greatly decreases the configuration space without degrading the searching opportunity. The cost function is set up deliberately to meet the special requirements of analog integrated circuits. Several net-length estimators are implemented which analog-circuit designers can choose with a trade-off between accuracy and efficiency. The global routing using the minimum Steiner tree is developed, which runs simultaneously during the placement configuration searching. This will ease the successive detail routing and greatly decrease the revise of final placement result. The layout example of optional amplifier is given to demonstrate its usability. The application of this algorithm drastically improves the design efficiency.</div>
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      <a class="title-link" href="2018.html">Free Space Management for Cut-Based Placement</a>
      <div class="authors"> by CJ Alpert, Nam, Gi-Joon, PG Villarrubia</div>
      <div class="color-grey-dark"><em>IC Graphic Design</em> <strong>2002</strong>, <em>1</em>(1), 1; Citation times: 66</div>
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        <div class="abstract-cropped inline">IP blocks and large macro cells are increasingly prevalent in physical design, actually causing an increase in the available free space for the dust logic. We observe that top-down placement based on recursive bisection with multilevel partitioning performs poorly on these porous designs. However, analytic solvers have the ability to find the natural distribution of cells in the layout. Consequently, we propose an enhancement to cut-based placement called Analytic Constraint Generation (ACG). ACG utilizes an analytic engine to set constraints for the multi-level partitioner. We show that for real industry designs, ACG significantly improves the performance of cut-based placement, as implemented within a state-of-the-art industrial placer.</div>
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      <a class="title-link" href="2018.html">A Cutting Algorithm for Optimizing the Wafer Exposure Pattern</a>
      <div class="authors"> by CF Chien, SC Hsu, JF Deng</div>
      <div class="color-grey-dark"><em>IC Graphic Design</em> <strong>2001</strong>, <em>1</em>(1), 1; Citation times: 46</div>
      <div class="abstract-div"> <a href="#" onclick="if (!window.__cfRLUnblockHandlers) return false; $(this).next('.abstract-cropped').toggleClass('inline').next('.abstract-full').toggleClass('inline'); return false;" > <strong>Abstract </strong></a>
        <div class="abstract-cropped inline">Semiconductor manufacturing industry competes by increasing yield and lowering die costs, thereby taking advantage of significant capital investments. Many studies focus on defect reduction to improve yield rate. However, the problem of optimizing wafer exposure patterns has received little attention. In this paper, given the specific patterning constraints, we develop a two-dimensional (2-D) cutting algorithm to maximize the gross die yields of the eight-inch wafer and larger circular wafers. The empirical results that we implemented in a wafer fabrication factory in Taiwan validate the practical viability of this approach. Similar approaches can readily be applied to other wafer patterning.</div>
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      <a class="title-link" href="2018.html">An Iterative Cutting Procedure for Determining the Optimal Wafer Exposure Pattern</a>
      <div class="authors"> by CF Chien, SC Hsu, JF Deng</div>
      <div class="color-grey-dark"><em>IC Graphic Design</em> <strong>1999</strong>, <em>1</em>(1), 1; Citation times: 35</div>
      <div class="abstract-div"> <a href="#" onclick="if (!window.__cfRLUnblockHandlers) return false; $(this).next('.abstract-cropped').toggleClass('inline').next('.abstract-full').toggleClass('inline'); return false;" > <strong>Abstract </strong></a>
        <div class="abstract-cropped inline">Conventionally, people focus on defect reduction to improve yield rate. Little research has been done to deal with the problem of optimizing wafer exposure patterns. This paper develops a computer-based procedure to maximize the number of dies possibly produced from a wafer. A program has been developed and implemented in a 6-in wafer fabrication factory in Taiwan. The results validate the practical viability of the proposed procedure.</div>
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      <a class="title-link" href="2018.html">Use of Neural Networks in Modeling Relations Between Exposure Energy and Pattern Dimension in Photolithography Process</a>
      <div class="authors"> by G Cardarelli, M Palumbo</div>
      <div class="color-grey-dark"><em>IC Graphic Design</em> <strong>1996</strong>, <em>1</em>(1), 1; Citation times: 32</div>
      <div class="abstract-div"> <a href="#" onclick="if (!window.__cfRLUnblockHandlers) return false; $(this).next('.abstract-cropped').toggleClass('inline').next('.abstract-full').toggleClass('inline'); return false;" > <strong>Abstract </strong></a>
        <div class="abstract-cropped inline">The photolithography process is one of the most complex operations in semiconductor production. Exposure energy definition is particularly critical because it strongly affects the operation results. Very complex links exist between exposure energy, pattern critical dimensions, photo resist thickness, and resistivity. At present, the wafer test experimental procedure is used in order to define suitable exposure energy. With the aim of finding a less expensive control criterion of exposure operation in the photolithography process, a neural network has been developed that is able to model the relation between exposure energy and pattern dimensions measured in different positions on the wafer. As a result, the neural network model developed has been found to perform as well as the very expensive test wafer procedure and constitutes a good alternative to this one, allowing for a remarkable cost reduction.</div>
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9
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8
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6
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5
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4
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3
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2
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</form>
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                    if ($("#js-main-top-container").parent("#js-large-main-top-container").length > 0) {
                        $("#js-main-top-container").appendTo($("#js-small-main-top-container"));
                    }
                }
                else {
                    if ($("#js-main-top-container").parent("#js-small-main-top-container").length > 0) {
                        $("#js-main-top-container").appendTo($("#js-large-main-top-container"));
                    }
                }
            }

            function recalculate_responsive_moving_containers() {
                $(".responsive-moving-container.large").each(function() {
                    var previousParent = $(".responsive-moving-container.active[data-id='"+$(this).data("id")+"']");
                    var movingContent  = previousParent.html();

                    if (Foundation.utils.is_small_only()) {
                        var currentParent = $(".responsive-moving-container.small[data-id='"+$(this).data("id")+"']");
                    }
                    else if (Foundation.utils.is_medium_only()) {
                        var currentParent = $(".responsive-moving-container.medium[data-id='"+$(this).data("id")+"']");
                    }
                    else {
                        var currentParent = $(".responsive-moving-container.large[data-id='"+$(this).data("id")+"']");
                    }

                    if (previousParent.attr("class") !== currentParent.attr("class")) {
                        currentParent.html(movingContent);
                        previousParent.html();
                        currentParent.addClass("active");
                        previousParent.removeClass("active");
                    }
                });
            }

            // cookies allowed is checked from a) local storage and b) from server separately so that the footer bar doesn't
            // get included in the custom page caches
            function checkCookiesAllowed() {
                var cookiesEnabled = localStorage.getItem("mdpi_cookies_enabled"); 

                if (null === cookiesEnabled) {
                    $.ajax({
                        url: "/ajax_cookie_value/mdpi_cookies_accepted",
                        success: function(data)
                        {
                            if (data.value) {
                                localStorage.setItem("mdpi_cookies_enabled", true);
                                checkDisplaySurvey();
                            }
                            else {
                                $(".js-allow-cookies").show();
                            }
                        }
                    });
                }
                else {
                    checkDisplaySurvey();
                }
            }

            // cookies allowed is checked from a) local storage and b) from server separately so that the footer bar doesn't
            // get included in the custom page caches
            //
            // NOTE! survey has been closed. Not used anymore (this code can be moved to somewhere for storage in case we need similar logic with other iterations)
            // 
            function checkDisplaySurvey() {
                
                var surveyDisabled = localStorage.getItem("mdpi_disable_survey"); 
                var viewCount      = localStorage.getItem("mdpi_new_layout_views"); 
                var viewLimit      = localStorage.getItem("mdpi_new_layout_limit");

                if (null !== surveyDisabled) {
                    return;
                }

                $('head').append('');

                return;
                // todo: the below part can be removed later on...

                if (null === viewLimit) {
                    localStorage.setItem("mdpi_new_layout_limit", Math.floor(Math.random() * 50));
                    localStorage.setItem("mdpi_new_layout_views", 0);
                }
                else {
                    viewCount++;
                    localStorage.setItem("mdpi_new_layout_views", viewCount);

                    if (viewCount >= viewLimit) {
                        $.ajax({
                            url: "/ajax_cookie_value/mdpi_disable_survey",
                            success: function(data)
                            {
                                if (data.value) {
                                    localStorage.setItem("mdpi_disable_survey", true);
                                }
                                else {
                                    $(".js-survey").show();
                                }
                            }
                        });
                    }
                }
            }
            
        </script>
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<script type="0e640e2117c7fbbce98e85e2-text/javascript">var banners_url = 'https://serve.mdpi.com';</script>
<script type="0e640e2117c7fbbce98e85e2-text/javascript" src='https://www.mdpi.com/assets/js/ifvisible.min.js?c621d19ecb761212'></script>
<script src="https://www.mdpi.com/assets/js/xmltohtml/affix.js?ac4ea55275297c15" type="0e640e2117c7fbbce98e85e2-text/javascript"></script>
<script src="https://www.mdpi.com/assets/js/clipboard.min.js?3f3688138a1b9fc4" type="0e640e2117c7fbbce98e85e2-text/javascript"></script>
<script type="0e640e2117c7fbbce98e85e2-text/javascript">
        $(document).ready(function()
        {
            var helpFunctions = $(".middle-column__help__fixed");
            var middleColumn  = $("#middle-column");

            helpFunctions.affix({
                offset: {
                    top: function() {
                        return middleColumn.offset().top - 8 - (Foundation.utils.is_medium_only() ? 30 : 0);
                    },
                    bottom: function() {
                        return $("#footer").innerHeight() + 56 + (Foundation.utils.is_medium_only() ? 0 : 0);
                    }
                }
            });

            new ClipboardJS('.js-clipboard-copy');
        });
    </script>
<script type="0e640e2117c7fbbce98e85e2-text/javascript">
        $(document).ready(function()
        {
            // create the left hand menu dynamically from the content
            var items = $("#middle-column h1, #middle-column h2");
            if ($("#dynamic-menu").length == 1 && items.length > 1) 
            {
                // menu container div
                var div = $("div#dynamic-menu");
                div.addClass("generic-item");

                // menu header
                var header = $("<h2></h2>");
                header.text("Menu");
                div.append(header);

                // menu list
                var ul = $("<ul></ul>");
                ul.addClass("side-menu-ul");
                div.append(ul);

                // menu list items (create additional anchors for page)
                items.each(function()
                {
                    var header_title = $(this).text();
                    var link_title   = header_title.replace(/ |-/gi, "_").toLowerCase();

                    var li = $("<li></li>");
                    li.addClass("side-menu-li");
                    ul.append(li);

                    var a = $("<a></a>");
                    a.html(header_title);
                    a.prop("href", "#" + link_title);
                    li.append(a);

                    var a = $("<a></a>");
                    a.prop("name", link_title);
                    $(this).prepend(a);
                });

                div.append(ul);
                div.show();
            }
        });
    </script>
<link rel="stylesheet" href="https://www.mdpi.com/assets/css/magnific-popup.min.css?04d343e036f8eecd">
<link rel="stylesheet" href="https://www.mdpi.com/assets/css/jquery-ui-1.10.4.custom.min.css?80647d88647bf347">
<script src="https://www.mdpi.com/assets/js/jquery-ui-1.12.0.min.js?4c2c52cc11e5a28d" type="0e640e2117c7fbbce98e85e2-text/javascript"></script>
<script type="0e640e2117c7fbbce98e85e2-text/javascript" src="https://www.mdpi.com/assets/js/magnific-popup.min.js?2be3d9e7dc569146"></script>
<script type="0e640e2117c7fbbce98e85e2-text/javascript">
        var mainColumn1    = "#right-column";
        var extendingReady = true;

        $(document).ready(function()
        {
            $("#journal-browser-go").toggleClass("button--grey",  "" === $("#journal-browser-volume").val());
            $("#journal-browser-go").toggleClass("button--color", "" !== $("#journal-browser-volume").val());

            $("#journal-browser-volume").change(function(e) {
                $('#journal-browser-issue').find('option').not('.volume-0').hide(); 
                $('#journal-browser-issue').find('.volume-' + $(this).val()).show(); 
                $('#journal-browser-issue').find('option:first').prop('selected', 'selected'); 
                $("#journal-browser-issue").trigger("chosen:updated");

                $('#journal-browser-go').toggleClass('button--grey',  '' === $(this).val());  
                $('#journal-browser-go').toggleClass('button--color', '' !== $(this).val());  
            });

            // add resize event for the window (to recalculate side column elements)
            // TODO: is it better to use resize end or resize here?
            $(window).on('resize', function() {
                mdpi_column_height_module.calculateColumnHeights(false, mainColumn1);
            });

            $(".link-journal-menu").click(function(e) {
                e.preventDefault();

                $(this).find('span').toggle();
                $(this).next("ul").toggleClass("active");
                $("#social-media-links").toggle();
                $("#journal-alerts").toggle();
            });

            $(".link-journal-browser").click(function(e) {
                e.preventDefault();

                $(this).find('span').toggle();
                $(this).next("div").toggleClass('show-for-medium-up');
            });

                    });
    </script>
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